1. Technical Field
The present invention relates to a semiconductor device and a method of fabricating the same, and more particularly, to a mold for forming a conductive bump used in connecting interconnections of a semiconductor device, a method of fabricating the mold, and a method of forming a bump on a semiconductor wafer using the mold.
2. Description of the Related Art
Micro devices such as a semiconductor device or a micro electro mechanical system (MEMS) normally use a wire bonding method, a taped automated bonding (TAB) method, a flip chip method or the like in order to electrically connect chips to an external substrate such as a printed circuit board (PCB).
The flip chip method has advantages over the other methods in that speed and power ratings of a device can be improved and the number of pads per unit area can be increased, since an electron pathway is short. Because of these advantages, the flip chip method is currently often used in electronic products requiring excellent electrical characteristics, for example, super computers, portable electronic products, and the like.
In the flip chip method, it is necessary to form a conductive bump such as a solder bump on a semiconductor wafer in order to adequately bond a chip and an external substrate. Technology for fabricating solder bumps has been developed to fabricate solder bumps having good conductivity, uniform height and a fine pitch. In the bump fabrication technology used in the flip chip method, the properties and the application ranges of the solder bumps depend on the material forming the bumps. Typical bump fabrication technology includes a solder ball placement method in which a solder ball is directly placed on a wafer, or an electroplating method, an evaporation method, and a stencil printing method, in which a solder bump is formed by reflow after intermediate formation processes. For example, in the stencil printing method, the intermediate formation process includes stencil printing solder paste on to the wafer.
The solder ball placement method includes placing pre-formed solder balls of substantially uniform dimensions on the wafer. An advantage of the solder ball placement method is that the uniformity of the heights of the solder bumps, after reflow, can be easily controlled, but drawbacks are that manufacturing speed is significantly low compared to that of the electroplating or stencil printing method, and the distance between bumps must be very wide to accommodate the solder ball placement equipment. When the electroplating method or the evaporation method is used, the types of component elements that form the solder bump are limited. That is, the solder bumps are difficult to fabricate when three metal elements or more are used in the electroplating method or the evaporation method. It is desirable to use multiple elements in the solder bump to achieve desired performance characteristics or to meet industry standards, such as environmental compliance. Further, since high-cost processes such as a photolithography process must be performed, fabrication costs increase.
The stencil printing method has an advantage that the bump fabrication facilities are relatively simple and low-priced, but it is limited in that the quality of the bump formed on a wafer depends on the physical properties of the printed solder paste, specifically, the mixture of solder powder and flux, and the fabrication capabilities of the stencil. In particular, as the size of a wafer increases, the integration density of semiconductor chips increases, and the number of pins increases, the stencil printing method becomes more limited in its ability to accomplish a required fine pitch and achieve coplanarity of the heights of the reflowed solder bumps.
Further, methods containing intermediate formation processes also have drawbacks in that continuous use may be limited because a substrate where a solder bump is formed may be damaged or worn by cleaning or by the pressure applied during the transfer of the solder bump to a semiconductor wafer.
The invention addresses these and other disadvantages of the conventional methods.